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内容説明 The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility， performance and energy efficiency constraints. As a consequence， the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms， MP-SoC)， which are tailored to the respective target application. In the usual case， a new platform is designed by selecting and assembling standard platform elements. The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design， communication modeling， and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation.