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内容説明
These proceedings contain the papers presented at the Advanced Research Working Conference on Correct Hardware Design Methodologies， held in Arles， France， in May 1993， and organized by the ESPRIT Working Group 6018 CHARME-2and the Universit de Provence， Marseille， in cooperation with IFIP Working Group 10.2. Formal verification is emerging as a plausible alternative to exhaustive simulation for establishing correct digital hardware designs. The validation of functional and timing behavior is a major bottleneck in current VLSI design systems， slowing the arrival of products in the marketplace with its associated increase in cost. From being a predominantly academic area of study until a few years ago， formal design and verification techniques are now beginning to migrate into industrial use. As we are now witnessing an increase in activity in this area in both academia and industry， the aim of this working conference was to bring together researchers and users from both communities.
Book Description
This book constitutes the refereed proceedings of the 10th IFIP WG10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods， CHARME’99， held in Bad Herrenalb， Germany in September 1999. The 20 revised full papers and 12 revised short papers presented together with two invited contributions were carefully reviewed and selected from 48 papers submitted. The papers are organized in topical sections on proofs of microprocessors， model checking， formal methods and industrial applications， abstraction and compositional techniques， theorem proving and related approaches， symbolic simulation and symbolic traversal， and specification languages and methodologies.
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